Computer Engineer · San Francisco Bay Area

ParsaRezvani.

Hi, I’m Parsa, a computer engineer who likes building things that have to survive the real world: drones, circuit boards, rockets. I just finished my degree at UC Santa Cruz, and I’m after the next hard problem to throw myself at.

Open to new-grad roles/SF Bay Area/UC Santa Cruz · ’26

About

Who I am

I’ve been taking things apart since I was a kid, chasing the moment a thing finally makes sense more than the building itself.

I get bothered when I don’t understand how something works, so I keep at it until I do.

That stubbornness became a computer engineering degree at UC Santa Cruz and a habit of building things I had no business building yet.

A few things I’ve done:

·Led my rocket team's avionics, the flight computer and the telemetry that phones home mid-flight, to a top-10 finish at IREC nationals.
·Researching FPGA CNN accelerators: pairing an ESP32-C3 with a Lattice iCE40 FPGA to run a hand-written RTL neural net on a live binarized camera feed, plus a toolchain that predicts which network will fit the chip before you ever synthesize it. 95% on MNIST at 72 fps in simulation so far, no board built yet.
·Built FireFly, a drone-based wildfire-detection system for terrain no one's watching yet, as my capstone.
·Taught myself guitar the same way I teach myself everything else: slowly, stubbornly, until it clicks.

When I’m not building something I’m usually in the gym, out on a trail, or cooking something that takes far too long.

Selected Work

Projects I've built

2025 to presentFeatured

FireFly

An autonomous wildfire-detection system for drones, built for terrain nobody's watching yet.

My capstone, and the project I lead as firmware developer. It's an autonomous detection system that rides on drones to spot wildfires early in remote areas with no existing sensor coverage. Those are the places where an hour of warning changes everything.

I wrote the ESP32-C3 firmware in C and ESP-IDF: it parses NMEA GNSS over UART, derives heading from successive fixes with atan2, and broadcasts 1 Hz telemetry two ways at once (UDP on the local network and HTTPS to the cloud) out of a single task loop. Baking the root certificates straight into the firmware killed a class of TLS failures that had been blocking the whole team's builds.

On top of that I built an onboard computer-vision pipeline (YOLOv8 on an ESP32-CAM, with sustained-tracking and grace-period gating to suppress false flicker) that geolocates each detection by fusing the drone's GPS and heading, then triangulates a fire's position across multiple drones. The ground station is Flask + PostgreSQL with token auth and hashed API keys, plotting multi-drone telemetry on a live map with sub-second updates. I also designed a custom 2-layer PCB that folds the ESP32-C3, GNSS module, and regulated power rails onto one flight-ready board, retiring the breadboard prototypes that kept failing under vibration.

Live ground station

2025

Hardware Verification & SoC Design

From primitive verification all the way to live FPGA bring-up.

Self-checking SystemVerilog testbenches for DFFs, counters, shift registers, FIFOs, and synchronous RAM, all ready/valid and AXI-Lite driven to surface bugs across 25+ obfuscated modules. I designed and verified a clock-domain-crossing FIFO with Gray-code pointers and dual-clock synchronizers, validated in a cocotb testbench with RMSE-based checking across five obfuscated implementations, then built a UART-based SoC tying AXI-Stream and memory-mapped peripherals together, verified end-to-end with constrained-random stimulus, GPIO control, and a live FPGA demo.

2024

Real-Time FPGA Game

An arcade game synthesized to silicon, in pure SystemVerilog.

A real-time game on a Basys3 FPGA: a four-state FSM, a VGA driver clocked at 25.175 MHz, BCD scoring on a seven-segment display, and pixel-level collision against procedurally spawned obstacles seeded by a 16-bit LFSR, with a vsync-driven collision flash.

2025 to 2026

LoopInterview

An AI interview coach I co-built, now used by 200+ people.

A full-stack AI interview-practice tool: React and TypeScript on the front, Python and Flask behind it, with structured LLM prompts generating role-specific questions and ElevenLabs voice over WebSocket for sub-300 ms speech. I ran it as a real build-measure-learn loop: pulling feedback from live users, prioritizing it into the roadmap, and shipping the changes that grew it past 200 users.

Experience

Internships & leadership

2024 to 2025

Artly AI

Engineering Intern · San Francisco

Engineered a CNN computer-vision pipeline for product identification (78% to 94% accuracy), enabling fully autonomous item ID with no manual lookup. Unified four robot subsystems over ROS2 (cutting manual intervention 60%), wrote PWM/PID motor-control firmware for the dispensing actuators, and chased CAN bus faults with an oscilloscope and protocol analyzer. I also wrote I²C and SPI sensor drivers feeding the real-time control loop and restructured the dispensing firmware around a FreeRTOS task model for deterministic timing. On the customer side I was the field-facing technical contact: bridging sales, customer success, and engineering, and live-troubleshooting deployed robot baristas on site.

2023 to present

UCSC Rocketry · IREC Team

Avionics Team Lead · Santa Cruz

Lead a 6-person avionics team to a top-10 finish at IREC nationals, delivering embedded telemetry and flight control for rockets reaching 2,000+ ft. Cut flight-data processing latency 25% with a sensor-fusion pipeline on Zephyr RTOS (IMU, barometer, and GPS combined through a complementary filter for real-time altitude and orientation), and designed a 900 MHz ground station with 5+ miles of range, presenting the live telemetry architecture to competition judges.

2022 to 2023

Invoiss

Software Engineering Intern · San Francisco

Architected REST API infrastructure on AWS handling 10,000+ daily requests, trimming response times 31% with CDN integration and request-level caching, and migrated the codebase to strict TypeScript to kill a class of runtime errors at build time. I owned customer onboarding end to end (scoping needs on the call, setting each customer up in the product, then shipping the features that came out of it), and helped integrate Twilio so invoices go out as SMS from a dedicated business number.

What I Work With

Languages & tools

Languages: C · C++ · Python · SystemVerilog · Verilog · RISC-V Assembly · TypeScript
Embedded & Hardware: ESP32 / ESP32-C3 · STM32 · Zephyr · FreeRTOS · I²C / SPI / UART · AXI · FPGA · PCB design
Verification & Tooling: cocotb · Verilator · SV testbenches · ROS2 · React / Flask · Firebase / AWS · Git · Linux

B.S. Computer Engineering, minor in Computer Science · UC Santa Cruz · Graduated June 2026 · GPA 3.7 / 4.0

Contact

Get in touch

Let’s build
something real.

Open to new-grad roles in embedded systems, hardware verification, robotics, and full-stack work. I read every message and reply within a day.